This artifact repository accompanies the paper “μ-ops, I Did it Again: A Second Look at Port Assignment on Intel CPUs”, by the Anonymous Authors.
It complements, and is inspired by, the monumental work of Abel and Reineke found at https://uops.info.
Microarchitecture | Commands Indexed |
---|---|
Broadwell | 1 |
Coffee Lake | 900 |
Comet Lake | 900 |
Cascade Lake | 1 |
Haswell | 1 |
Ice Lake | 1 |
Skylake | 1 |
Sandy Bridge | 1 |
Westmere | 1 |
Most of our microbenchmarks consisted of small code blocks comprising an LFENCE
instruction, followed by a pair of two other instructions.
For example, to analyze the LFENCE; STC; ADD R64, R64
code block, we invoked nanoBench with the following command:
sudo ./kernel-nanoBench.sh -no_norm -n_meas 1
-warm_up_count 10
-config configs/cfg_port_0156_only.txt
-asm "LFENCE; STC; ADD RAX, RBX"
-unroll 120
We measure the μ-ops dispatched to each port across increasing unroll factors, with unroll values ranging from 100 to 6980. Each unroll factor is repeated multiple times, and we take the mean and standard deviation of the μ-ops dispatched to each port.
We focus our attention on instructions that are CPU-bound, and do not involve memory access (neither load, nor store). This is done in order to avoid latency affects caused by memory/cache accesses, which are by nature dynamic.
In particular, we consider very short code blocks, that will be available from the L1 i-cache.
For the most part, the instructions we consider are decoded to a single μ-op.
However, distinct μ-ops may require a distinct number of cycles for executing.
Similarly to the notation used by Abel et al., we will denote the eligibility set of an instruction by pXYZW
. For example, the eligibility set of CBW
is p0156
, since it may be executed on any of the ports 0, 1, 5, or 6, whereas the eligibility set of SHL R64, 1
is p06
, since it may only be executed on ports 0 or 6.
In all figures, the X axis represents the unroll factor, representing the number of times the microbenchmark is executed before its performance is measured, and the Y axis represents the number of μ-ops dispatched to each port, surrounded by error bars.
LFENCE;ADD RAX,RBX;ADD RAX,RBX
𓅥
LFENCE;ADD RAX,RBX;ADOX RAX,RBX
𓃵
LFENCE;ADD RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;ADD RAX,RBX;AND RAX,RBX
𓅥
LFENCE;ADD RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;ADD RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;ADD RAX,RBX;CMP RAX,RBX
𓅥
LFENCE;ADD RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;ADD RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;ADD RAX,RBX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;ADD RAX,RBX;MOV RAX,0X80000000
𓅥
LFENCE;ADD RAX,RBX;MOV RAX,1
𓅥
LFENCE;ADD RAX,RBX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;ADD RAX,RBX;MOVZX RAX,AX
𓅥
LFENCE;ADD RAX,RBX;MULPS XMM0,XMM1
LFENCE;ADD RAX,RBX;OR RAX,RBX
𓅥
LFENCE;ADD RAX,RBX;PADDQ MM0,MM1
LFENCE;ADD RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;ADD RAX,RBX;SHL RAX,1
𓃵
LFENCE;ADD RAX,RBX;SUB RAX,RBX
𓅥
LFENCE;ADD RAX,RBX;TEST RAX,RBX
𓅥
LFENCE;ADD RAX,RBX;XOR RAX,RBX
𓅥
LFENCE;ADOX RAX,RBX;ADD RAX,RBX
𓃵
LFENCE;ADOX RAX,RBX;ADOX RAX,RBX
𓆡
LFENCE;ADOX RAX,RBX;AESDEC XMM0,XMM1
𓃰
LFENCE;ADOX RAX,RBX;AND RAX,RBX
𓃵
LFENCE;ADOX RAX,RBX;ANDPS XMM0,XMM1
LFENCE;ADOX RAX,RBX;BSR RAX,RBX
𓈗
LFENCE;ADOX RAX,RBX;CMP RAX,RBX
𓃵
LFENCE;ADOX RAX,RBX;IMUL RAX,RBX
𓈗
LFENCE;ADOX RAX,RBX;LEA RAX,[RBX]
𓃵
LFENCE;ADOX RAX,RBX;MOV RAX,0X7FFFFFFF
LFENCE;ADOX RAX,RBX;MOV RAX,0X80000000
𓃵
LFENCE;ADOX RAX,RBX;MOVHLPS XMM0,XMM1
LFENCE;ADOX RAX,RBX;MOVZX RAX,AX
𓃵
LFENCE;ADOX RAX,RBX;MULPS XMM0,XMM1
LFENCE;ADOX RAX,RBX;OR RAX,RBX
𓃵
LFENCE;ADOX RAX,RBX;PADDQ MM0,MM1
LFENCE;ADOX RAX,RBX;POPCNT RAX,RBX
𓈗
LFENCE;ADOX RAX,RBX;SHL RAX,1
𓆡
LFENCE;ADOX RAX,RBX;SUB RAX,RBX
𓃵
LFENCE;ADOX RAX,RBX;TEST RAX,RBX
𓃵
LFENCE;ADOX RAX,RBX;XOR RAX,RBX
𓃵
LFENCE;AESDEC XMM0,XMM1;ADD RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;ADOX RAX,RBX
𓆡
LFENCE;AESDEC XMM0,XMM1;AESDEC XMM0,XMM1
LFENCE;AESDEC XMM0,XMM1;AND RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;ANDPS XMM0,XMM1
𓃂
LFENCE;AESDEC XMM0,XMM1;BSR RAX,RBX
LFENCE;AESDEC XMM0,XMM1;CMP RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;CWDE
𓀡
LFENCE;AESDEC XMM0,XMM1;DEC RAX
𓀡
LFENCE;AESDEC XMM0,XMM1;IMUL RAX,RBX
LFENCE;AESDEC XMM0,XMM1;INC RAX
𓀡
LFENCE;AESDEC XMM0,XMM1;LEA RAX,[RBX]
𓃂
LFENCE;AESDEC XMM0,XMM1;MOV RAX,0X7FFFFFFF
𓀡
LFENCE;AESDEC XMM0,XMM1;MOV RAX,0X80000000
𓀡
LFENCE;AESDEC XMM0,XMM1;MOV RAX,1
𓀡
LFENCE;AESDEC XMM0,XMM1;MOVHLPS XMM0,XMM1
LFENCE;AESDEC XMM0,XMM1;MOVZX RAX,AX
𓀡
LFENCE;AESDEC XMM0,XMM1;MULPS XMM0,XMM1
LFENCE;AESDEC XMM0,XMM1;NEG RAX
𓀡
LFENCE;AESDEC XMM0,XMM1;NOT RAX
𓀡
LFENCE;AESDEC XMM0,XMM1;OR RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;PADDQ MM0,MM1
LFENCE;AESDEC XMM0,XMM1;POPCNT RAX,RBX
LFENCE;AESDEC XMM0,XMM1;SHL RAX,1
𓆡
LFENCE;AESDEC XMM0,XMM1;SUB RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;TEST RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;XOR RAX,RBX
𓀡
LFENCE;AND RAX,RBX;ADD RAX,RBX
𓅥
LFENCE;AND RAX,RBX;ADOX RAX,RBX
𓃵
LFENCE;AND RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;AND RAX,RBX;AND RAX,RBX
𓅥
LFENCE;AND RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;AND RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;AND RAX,RBX;CMP RAX,RBX
𓅥
LFENCE;AND RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;AND RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;AND RAX,RBX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;AND RAX,RBX;MOV RAX,0X80000000
𓅥
LFENCE;AND RAX,RBX;MOV RAX,1
𓅥
LFENCE;AND RAX,RBX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;AND RAX,RBX;MOVZX RAX,AX
𓅥
LFENCE;AND RAX,RBX;MULPS XMM0,XMM1
LFENCE;AND RAX,RBX;OR RAX,RBX
𓅥
LFENCE;AND RAX,RBX;PADDQ MM0,MM1
LFENCE;AND RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;AND RAX,RBX;SHL RAX,1
𓃵
LFENCE;AND RAX,RBX;SUB RAX,RBX
𓅥
LFENCE;AND RAX,RBX;TEST RAX,RBX
𓅥
LFENCE;AND RAX,RBX;XOR RAX,RBX
𓅥
LFENCE;ANDPS XMM0,XMM1;ADD RAX,RBX
LFENCE;ANDPS XMM0,XMM1;ADOX RAX,RBX
LFENCE;ANDPS XMM0,XMM1;AESDEC XMM0,XMM1
LFENCE;ANDPS XMM0,XMM1;AND RAX,RBX
LFENCE;ANDPS XMM0,XMM1;ANDPS XMM0,XMM1
LFENCE;ANDPS XMM0,XMM1;BSR RAX,RBX
LFENCE;ANDPS XMM0,XMM1;CMP RAX,RBX
LFENCE;ANDPS XMM0,XMM1;DEC RAX
LFENCE;ANDPS XMM0,XMM1;IMUL RAX,RBX
LFENCE;ANDPS XMM0,XMM1;INC RAX
LFENCE;ANDPS XMM0,XMM1;LEA RAX,[RBX]
LFENCE;ANDPS XMM0,XMM1;MOV RAX,0X7FFFFFFF
LFENCE;ANDPS XMM0,XMM1;MOV RAX,0X80000000
LFENCE;ANDPS XMM0,XMM1;MOV RAX,1
LFENCE;ANDPS XMM0,XMM1;MOVHLPS XMM0,XMM1
LFENCE;ANDPS XMM0,XMM1;MOVZX RAX,AX
LFENCE;ANDPS XMM0,XMM1;MULPS XMM0,XMM1
LFENCE;ANDPS XMM0,XMM1;NEG RAX
LFENCE;ANDPS XMM0,XMM1;NOT RAX
LFENCE;ANDPS XMM0,XMM1;OR RAX,RBX
LFENCE;ANDPS XMM0,XMM1;PADDQ MM0,MM1
LFENCE;ANDPS XMM0,XMM1;POPCNT RAX,RBX
LFENCE;ANDPS XMM0,XMM1;SHL RAX,1
LFENCE;ANDPS XMM0,XMM1;SUB RAX,RBX
LFENCE;ANDPS XMM0,XMM1;TEST RAX,RBX
LFENCE;ANDPS XMM0,XMM1;XOR RAX,RBX
LFENCE;BSR RAX,RBX;ADD RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;ADOX RAX,RBX
𓈗
LFENCE;BSR RAX,RBX;AESDEC XMM0,XMM1
LFENCE;BSR RAX,RBX;AND RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;ANDPS XMM0,XMM1
LFENCE;BSR RAX,RBX;BSR RAX,RBX
LFENCE;BSR RAX,RBX;CMP RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;IMUL RAX,RBX
LFENCE;BSR RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;BSR RAX,RBX;MOV RAX,0X7FFFFFFF
𓇣
LFENCE;BSR RAX,RBX;MOV RAX,0X80000000
𓇣
LFENCE;BSR RAX,RBX;MOV RAX,1
𓇣
LFENCE;BSR RAX,RBX;MOVHLPS XMM0,XMM1
𓂀
LFENCE;BSR RAX,RBX;MOVZX RAX,AX
𓇣
LFENCE;BSR RAX,RBX;MULPS XMM0,XMM1
LFENCE;BSR RAX,RBX;OR RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;PADDQ MM0,MM1
LFENCE;BSR RAX,RBX;POPCNT RAX,RBX
LFENCE;BSR RAX,RBX;SHL RAX,1
𓈗
LFENCE;BSR RAX,RBX;SUB RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;TEST RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;XOR RAX,RBX
𓇣
LFENCE;CBW;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;CBW;MOV RAX,0X80000000
𓅥
LFENCE;CBW;MOVHLPS XMM0,XMM1
𓅃
LFENCE;CMC;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;CMC;MOV RAX,0X80000000
𓅥
LFENCE;CMC;MOVHLPS XMM0,XMM1
𓅃
LFENCE;CMP RAX,RBX;ADD RAX,RBX
𓅥
LFENCE;CMP RAX,RBX;ADOX RAX,RBX
𓃵
LFENCE;CMP RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;CMP RAX,RBX;AND RAX,RBX
𓅥
LFENCE;CMP RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;CMP RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;CMP RAX,RBX;CMP RAX,RBX
𓅥
LFENCE;CMP RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;CMP RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;CMP RAX,RBX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;CMP RAX,RBX;MOV RAX,0X80000000
𓅥
LFENCE;CMP RAX,RBX;MOV RAX,1
𓅥
LFENCE;CMP RAX,RBX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;CMP RAX,RBX;MOVZX RAX,AX
𓅥
LFENCE;CMP RAX,RBX;MULPS XMM0,XMM1
LFENCE;CMP RAX,RBX;OR RAX,RBX
𓅥
LFENCE;CMP RAX,RBX;PADDQ MM0,MM1
LFENCE;CMP RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;CMP RAX,RBX;SHL RAX,1
𓃵
LFENCE;CMP RAX,RBX;SUB RAX,RBX
𓅥
LFENCE;CMP RAX,RBX;TEST RAX,RBX
𓅥
LFENCE;CMP RAX,RBX;XOR RAX,RBX
𓅥
LFENCE;CWDE;AESDEC XMM0,XMM1
𓆣
LFENCE;CWDE;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;CWDE;MOV RAX,0X80000000
𓅥
LFENCE;CWDE;MOVHLPS XMM0,XMM1
𓅃
LFENCE;DEC RAX;AESDEC XMM0,XMM1
𓆣
LFENCE;DEC RAX;ANDPS XMM0,XMM1
𓂀
LFENCE;DEC RAX;LEA RAX,[RBX]
𓂀
LFENCE;DEC RAX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;DEC RAX;MOV RAX,0X80000000
𓅥
LFENCE;DEC RAX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;DEC RAX;MULPS XMM0,XMM1
LFENCE;DEC RAX;POPCNT RAX,RBX
𓆏
LFENCE;IMUL RAX,RBX;ADD RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;ADOX RAX,RBX
𓈗
LFENCE;IMUL RAX,RBX;AESDEC XMM0,XMM1
LFENCE;IMUL RAX,RBX;AND RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;ANDPS XMM0,XMM1
LFENCE;IMUL RAX,RBX;BSR RAX,RBX
LFENCE;IMUL RAX,RBX;CMP RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;IMUL RAX,RBX
LFENCE;IMUL RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;IMUL RAX,RBX;MOV RAX,0X7FFFFFFF
𓇣
LFENCE;IMUL RAX,RBX;MOV RAX,0X80000000
𓇣
LFENCE;IMUL RAX,RBX;MOV RAX,1
𓇣
LFENCE;IMUL RAX,RBX;MOVHLPS XMM0,XMM1
𓂀
LFENCE;IMUL RAX,RBX;MOVZX RAX,AX
𓇣
LFENCE;IMUL RAX,RBX;MULPS XMM0,XMM1
LFENCE;IMUL RAX,RBX;OR RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;PADDQ MM0,MM1
LFENCE;IMUL RAX,RBX;POPCNT RAX,RBX
LFENCE;IMUL RAX,RBX;SHL RAX,1
𓈗
LFENCE;IMUL RAX,RBX;SUB RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;TEST RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;XOR RAX,RBX
𓇣
LFENCE;INC RAX;AESDEC XMM0,XMM1
𓆣
LFENCE;INC RAX;ANDPS XMM0,XMM1
𓂀
LFENCE;INC RAX;LEA RAX,[RBX]
𓂀
LFENCE;INC RAX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;INC RAX;MOV RAX,0X80000000
𓅥
LFENCE;INC RAX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;INC RAX;MULPS XMM0,XMM1
LFENCE;INC RAX;POPCNT RAX,RBX
𓆏
LFENCE;LEA RAX,[RBX];ADD RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];ADOX RAX,RBX
𓈗
LFENCE;LEA RAX,[RBX];AESDEC XMM0,XMM1
LFENCE;LEA RAX,[RBX];AND RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];ANDPS XMM0,XMM1
LFENCE;LEA RAX,[RBX];BSR RAX,RBX
LFENCE;LEA RAX,[RBX];CMP RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];DEC RAX
𓇣
LFENCE;LEA RAX,[RBX];IMUL RAX,RBX
LFENCE;LEA RAX,[RBX];INC RAX
𓇣
LFENCE;LEA RAX,[RBX];LEA RAX,[RBX]
𓂀
LFENCE;LEA RAX,[RBX];MOV RAX,0X7FFFFFFF
𓇣
LFENCE;LEA RAX,[RBX];MOV RAX,0X80000000
𓇣
LFENCE;LEA RAX,[RBX];MOV RAX,1
𓇣
LFENCE;LEA RAX,[RBX];MOVHLPS XMM0,XMM1
𓅢
LFENCE;LEA RAX,[RBX];MOVZX RAX,AX
𓇣
LFENCE;LEA RAX,[RBX];MULPS XMM0,XMM1
LFENCE;LEA RAX,[RBX];NEG RAX
𓇣
LFENCE;LEA RAX,[RBX];NOT RAX
𓇣
LFENCE;LEA RAX,[RBX];OR RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];PADDQ MM0,MM1
LFENCE;LEA RAX,[RBX];POPCNT RAX,RBX
LFENCE;LEA RAX,[RBX];SHL RAX,1
𓈗
LFENCE;LEA RAX,[RBX];SUB RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];TEST RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];XOR RAX,RBX
𓇣
LFENCE;MOV RAX,0X7FFFFFFF;ADD RAX,RBX
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;ADOX RAX,RBX
𓃵
LFENCE;MOV RAX,0X7FFFFFFF;AESDEC XMM0,XMM1
𓆣
LFENCE;MOV RAX,0X7FFFFFFF;AND RAX,RBX
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;ANDPS XMM0,XMM1
𓂀
LFENCE;MOV RAX,0X7FFFFFFF;BSR RAX,RBX
𓆏
LFENCE;MOV RAX,0X7FFFFFFF;CBW
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;CMC
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;CMP RAX,RBX
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;CWDE
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;DEC RAX
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;IMUL RAX,RBX
𓆏
LFENCE;MOV RAX,0X7FFFFFFF;INC RAX
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;LEA RAX,[RBX]
𓂀
LFENCE;MOV RAX,0X7FFFFFFF;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;MOV RAX,0X80000000
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;MOV RAX,1
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;MOVHLPS XMM0,XMM1
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;MOVZX RAX,AX
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;MULPS XMM0,XMM1
LFENCE;MOV RAX,0X7FFFFFFF;NEG RAX
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;NOT RAX
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;OR RAX,RBX
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;PADDQ MM0,MM1
LFENCE;MOV RAX,0X7FFFFFFF;POPCNT RAX,RBX
𓆏
LFENCE;MOV RAX,0X7FFFFFFF;SHL RAX,1
𓃵
LFENCE;MOV RAX,0X7FFFFFFF;STC
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;SUB RAX,RBX
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;TEST RAX,RBX
𓅥
LFENCE;MOV RAX,0X7FFFFFFF;XOR RAX,RBX
𓅥
LFENCE;MOV RAX,0X80000000;ADD RAX,RBX
𓅥
LFENCE;MOV RAX,0X80000000;ADOX RAX,RBX
𓃵
LFENCE;MOV RAX,0X80000000;AESDEC XMM0,XMM1
𓆣
LFENCE;MOV RAX,0X80000000;AND RAX,RBX
𓅥
LFENCE;MOV RAX,0X80000000;ANDPS XMM0,XMM1
𓂀
LFENCE;MOV RAX,0X80000000;BSR RAX,RBX
𓆏
LFENCE;MOV RAX,0X80000000;CBW
𓅥
LFENCE;MOV RAX,0X80000000;CMC
𓅥
LFENCE;MOV RAX,0X80000000;CMP RAX,RBX
𓅥
LFENCE;MOV RAX,0X80000000;CWDE
𓅥
LFENCE;MOV RAX,0X80000000;DEC RAX
𓅥
LFENCE;MOV RAX,0X80000000;IMUL RAX,RBX
𓆏
LFENCE;MOV RAX,0X80000000;INC RAX
𓅥
LFENCE;MOV RAX,0X80000000;LEA RAX,[RBX]
𓂀
LFENCE;MOV RAX,0X80000000;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;MOV RAX,0X80000000;MOV RAX,0X80000000
𓅥
LFENCE;MOV RAX,0X80000000;MOV RAX,1
𓅥
LFENCE;MOV RAX,0X80000000;MOVHLPS XMM0,XMM1
𓅃
LFENCE;MOV RAX,0X80000000;MOVZX RAX,AX
𓅥
LFENCE;MOV RAX,0X80000000;MULPS XMM0,XMM1
LFENCE;MOV RAX,0X80000000;NEG RAX
𓅥
LFENCE;MOV RAX,0X80000000;NOT RAX
𓅥
LFENCE;MOV RAX,0X80000000;OR RAX,RBX
𓅥
LFENCE;MOV RAX,0X80000000;PADDQ MM0,MM1
LFENCE;MOV RAX,0X80000000;POPCNT RAX,RBX
𓆏
LFENCE;MOV RAX,0X80000000;SHL RAX,1
𓃵
LFENCE;MOV RAX,0X80000000;STC
𓅥
LFENCE;MOV RAX,0X80000000;SUB RAX,RBX
𓅥
LFENCE;MOV RAX,0X80000000;TEST RAX,RBX
𓅥
LFENCE;MOV RAX,0X80000000;XOR RAX,RBX
𓅥
LFENCE;MOV RAX,1;ADD RAX,RBX
𓅥
LFENCE;MOV RAX,1;ADOX RAX,RBX
𓃵
LFENCE;MOV RAX,1;AESDEC XMM0,XMM1
𓆣
LFENCE;MOV RAX,1;AND RAX,RBX
𓅥
LFENCE;MOV RAX,1;ANDPS XMM0,XMM1
𓂀
LFENCE;MOV RAX,1;BSR RAX,RBX
𓆏
LFENCE;MOV RAX,1;CMP RAX,RBX
𓅥
LFENCE;MOV RAX,1;IMUL RAX,RBX
𓆏
LFENCE;MOV RAX,1;LEA RAX,[RBX]
𓂀
LFENCE;MOV RAX,1;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;MOV RAX,1;MOV RAX,0X80000000
𓅥
LFENCE;MOV RAX,1;MOVHLPS XMM0,XMM1
𓅃
LFENCE;MOV RAX,1;MOVZX RAX,AX
𓅥
LFENCE;MOV RAX,1;MULPS XMM0,XMM1
LFENCE;MOV RAX,1;PADDQ MM0,MM1
LFENCE;MOV RAX,1;POPCNT RAX,RBX
𓆏
LFENCE;MOV RAX,1;SUB RAX,RBX
𓅥
LFENCE;MOV RAX,1;TEST RAX,RBX
𓅥
LFENCE;MOV RAX,1;XOR RAX,RBX
𓅥
LFENCE;MOVHLPS XMM0,XMM1;ADD RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;ADOX RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;AESDEC XMM0,XMM1
LFENCE;MOVHLPS XMM0,XMM1;AND RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;ANDPS XMM0,XMM1
LFENCE;MOVHLPS XMM0,XMM1;BSR RAX,RBX
𓂀
LFENCE;MOVHLPS XMM0,XMM1;CMP RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;DEC RAX
LFENCE;MOVHLPS XMM0,XMM1;IMUL RAX,RBX
𓂀
LFENCE;MOVHLPS XMM0,XMM1;INC RAX
LFENCE;MOVHLPS XMM0,XMM1;LEA RAX,[RBX]
𓅢
LFENCE;MOVHLPS XMM0,XMM1;MOV RAX,0X7FFFFFFF
LFENCE;MOVHLPS XMM0,XMM1;MOV RAX,0X80000000
LFENCE;MOVHLPS XMM0,XMM1;MOV RAX,1
LFENCE;MOVHLPS XMM0,XMM1;MOVHLPS XMM0,XMM1
LFENCE;MOVHLPS XMM0,XMM1;MOVZX RAX,AX
LFENCE;MOVHLPS XMM0,XMM1;MULPS XMM0,XMM1
LFENCE;MOVHLPS XMM0,XMM1;NEG RAX
LFENCE;MOVHLPS XMM0,XMM1;NOT RAX
LFENCE;MOVHLPS XMM0,XMM1;OR RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;PADDQ MM0,MM1
LFENCE;MOVHLPS XMM0,XMM1;POPCNT RAX,RBX
𓂀
LFENCE;MOVHLPS XMM0,XMM1;SHL RAX,1
LFENCE;MOVHLPS XMM0,XMM1;SUB RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;TEST RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;XOR RAX,RBX
LFENCE;MOVZX RAX,AX;ADD RAX,RBX
𓅥
LFENCE;MOVZX RAX,AX;ADOX RAX,RBX
𓃵
LFENCE;MOVZX RAX,AX;AESDEC XMM0,XMM1
𓆣
LFENCE;MOVZX RAX,AX;AND RAX,RBX
𓅥
LFENCE;MOVZX RAX,AX;ANDPS XMM0,XMM1
𓂀
LFENCE;MOVZX RAX,AX;BSR RAX,RBX
𓆏
LFENCE;MOVZX RAX,AX;CMP RAX,RBX
𓅥
LFENCE;MOVZX RAX,AX;IMUL RAX,RBX
𓆏
LFENCE;MOVZX RAX,AX;LEA RAX,[RBX]
𓂀
LFENCE;MOVZX RAX,AX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;MOVZX RAX,AX;MOV RAX,0X80000000
𓅥
LFENCE;MOVZX RAX,AX;MOV RAX,1
𓅥
LFENCE;MOVZX RAX,AX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;MOVZX RAX,AX;MOVZX RAX,AX
𓅥
LFENCE;MOVZX RAX,AX;MULPS XMM0,XMM1
LFENCE;MOVZX RAX,AX;OR RAX,RBX
𓅥
LFENCE;MOVZX RAX,AX;PADDQ MM0,MM1
LFENCE;MOVZX RAX,AX;POPCNT RAX,RBX
𓆏
LFENCE;MOVZX RAX,AX;SHL RAX,1
𓃵
LFENCE;MOVZX RAX,AX;SUB RAX,RBX
𓅥
LFENCE;MOVZX RAX,AX;TEST RAX,RBX
𓅥
LFENCE;MOVZX RAX,AX;XOR RAX,RBX
𓅥
LFENCE;MULPS XMM0,XMM1;ADD RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;ADOX RAX,RBX
𓆡
LFENCE;MULPS XMM0,XMM1;AESDEC XMM0,XMM1
LFENCE;MULPS XMM0,XMM1;AND RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;ANDPS XMM0,XMM1
𓃂
LFENCE;MULPS XMM0,XMM1;BSR RAX,RBX
LFENCE;MULPS XMM0,XMM1;CMP RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;DEC RAX
𓀡
LFENCE;MULPS XMM0,XMM1;IMUL RAX,RBX
LFENCE;MULPS XMM0,XMM1;INC RAX
𓀡
LFENCE;MULPS XMM0,XMM1;LEA RAX,[RBX]
𓃂
LFENCE;MULPS XMM0,XMM1;MOV RAX,0X7FFFFFFF
𓀡
LFENCE;MULPS XMM0,XMM1;MOV RAX,0X80000000
𓀡
LFENCE;MULPS XMM0,XMM1;MOV RAX,1
𓀡
LFENCE;MULPS XMM0,XMM1;MOVHLPS XMM0,XMM1
LFENCE;MULPS XMM0,XMM1;MOVZX RAX,AX
𓀡
LFENCE;MULPS XMM0,XMM1;MULPS XMM0,XMM1
LFENCE;MULPS XMM0,XMM1;NEG RAX
𓀡
LFENCE;MULPS XMM0,XMM1;NOT RAX
𓀡
LFENCE;MULPS XMM0,XMM1;OR RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;PADDQ MM0,MM1
LFENCE;MULPS XMM0,XMM1;POPCNT RAX,RBX
LFENCE;MULPS XMM0,XMM1;SHL RAX,1
𓆡
LFENCE;MULPS XMM0,XMM1;SUB RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;TEST RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;XOR RAX,RBX
𓀡
LFENCE;NEG RAX;AESDEC XMM0,XMM1
𓆣
LFENCE;NEG RAX;ANDPS XMM0,XMM1
𓂀
LFENCE;NEG RAX;LEA RAX,[RBX]
𓂀
LFENCE;NEG RAX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;NEG RAX;MOV RAX,0X80000000
𓅥
LFENCE;NEG RAX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;NEG RAX;MULPS XMM0,XMM1
LFENCE;NEG RAX;POPCNT RAX,RBX
𓆏
LFENCE;NOT RAX;AESDEC XMM0,XMM1
𓆣
LFENCE;NOT RAX;ANDPS XMM0,XMM1
𓂀
LFENCE;NOT RAX;LEA RAX,[RBX]
𓂀
LFENCE;NOT RAX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;NOT RAX;MOV RAX,0X80000000
𓅥
LFENCE;NOT RAX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;NOT RAX;MULPS XMM0,XMM1
LFENCE;NOT RAX;POPCNT RAX,RBX
𓆏
LFENCE;OR RAX,RBX;ADD RAX,RBX
𓅥
LFENCE;OR RAX,RBX;ADOX RAX,RBX
𓃵
LFENCE;OR RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;OR RAX,RBX;AND RAX,RBX
𓅥
LFENCE;OR RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;OR RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;OR RAX,RBX;CMP RAX,RBX
𓅥
LFENCE;OR RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;OR RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;OR RAX,RBX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;OR RAX,RBX;MOV RAX,0X80000000
𓅥
LFENCE;OR RAX,RBX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;OR RAX,RBX;MOVZX RAX,AX
𓅥
LFENCE;OR RAX,RBX;MULPS XMM0,XMM1
LFENCE;OR RAX,RBX;OR RAX,RBX
𓅥
LFENCE;OR RAX,RBX;PADDQ MM0,MM1
LFENCE;OR RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;OR RAX,RBX;SUB RAX,RBX
𓅥
LFENCE;OR RAX,RBX;TEST RAX,RBX
𓅥
LFENCE;OR RAX,RBX;XOR RAX,RBX
𓅥
LFENCE;PADDQ MM0,MM1;ADD RAX,RBX
𓀡
LFENCE;PADDQ MM0,MM1;ADOX RAX,RBX
𓆡
LFENCE;PADDQ MM0,MM1;AESDEC XMM0,XMM1
LFENCE;PADDQ MM0,MM1;AND RAX,RBX
𓀡
LFENCE;PADDQ MM0,MM1;ANDPS XMM0,XMM1
𓃂
LFENCE;PADDQ MM0,MM1;BSR RAX,RBX
LFENCE;PADDQ MM0,MM1;CMP RAX,RBX
𓀡
LFENCE;PADDQ MM0,MM1;DEC RAX
𓀡
LFENCE;PADDQ MM0,MM1;IMUL RAX,RBX
LFENCE;PADDQ MM0,MM1;INC RAX
𓀡
LFENCE;PADDQ MM0,MM1;LEA RAX,[RBX]
LFENCE;PADDQ MM0,MM1;MOV RAX,0X7FFFFFFF
𓀡
LFENCE;PADDQ MM0,MM1;MOV RAX,0X80000000
𓀡
LFENCE;PADDQ MM0,MM1;MOV RAX,1
𓀡
LFENCE;PADDQ MM0,MM1;MOVHLPS XMM0,XMM1
LFENCE;PADDQ MM0,MM1;MOVZX RAX,AX
𓀡
LFENCE;PADDQ MM0,MM1;MULPS XMM0,XMM1
LFENCE;PADDQ MM0,MM1;NEG RAX
𓀡
LFENCE;PADDQ MM0,MM1;NOT RAX
𓀡
LFENCE;PADDQ MM0,MM1;OR RAX,RBX
𓀡
LFENCE;PADDQ MM0,MM1;PADDQ MM0,MM1
LFENCE;PADDQ MM0,MM1;POPCNT RAX,RBX
LFENCE;PADDQ MM0,MM1;SHL RAX,1
𓆡
LFENCE;PADDQ MM0,MM1;SUB RAX,RBX
𓀡
LFENCE;PADDQ MM0,MM1;TEST RAX,RBX
𓀡
LFENCE;PADDQ MM0,MM1;XOR RAX,RBX
𓀡
LFENCE;POPCNT RAX,RBX;ADD RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;ADOX RAX,RBX
𓈗
LFENCE;POPCNT RAX,RBX;AESDEC XMM0,XMM1
LFENCE;POPCNT RAX,RBX;AND RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;ANDPS XMM0,XMM1
LFENCE;POPCNT RAX,RBX;BSR RAX,RBX
LFENCE;POPCNT RAX,RBX;CMP RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;DEC RAX
𓇣
LFENCE;POPCNT RAX,RBX;IMUL RAX,RBX
LFENCE;POPCNT RAX,RBX;INC RAX
𓇣
LFENCE;POPCNT RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;POPCNT RAX,RBX;MOV RAX,0X7FFFFFFF
𓇣
LFENCE;POPCNT RAX,RBX;MOV RAX,0X80000000
𓇣
LFENCE;POPCNT RAX,RBX;MOV RAX,1
𓇣
LFENCE;POPCNT RAX,RBX;MOVHLPS XMM0,XMM1
𓂀
LFENCE;POPCNT RAX,RBX;MOVZX RAX,AX
𓇣
LFENCE;POPCNT RAX,RBX;MULPS XMM0,XMM1
LFENCE;POPCNT RAX,RBX;NEG RAX
𓇣
LFENCE;POPCNT RAX,RBX;NOT RAX
𓇣
LFENCE;POPCNT RAX,RBX;OR RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;PADDQ MM0,MM1
LFENCE;POPCNT RAX,RBX;POPCNT RAX,RBX
LFENCE;POPCNT RAX,RBX;SHL RAX,1
𓈗
LFENCE;POPCNT RAX,RBX;SUB RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;TEST RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;XOR RAX,RBX
𓇣
LFENCE;SHL RAX,1;ADD RAX,RBX
𓃵
LFENCE;SHL RAX,1;ADOX RAX,RBX
𓆡
LFENCE;SHL RAX,1;AESDEC XMM0,XMM1
𓃰
LFENCE;SHL RAX,1;AND RAX,RBX
𓃵
LFENCE;SHL RAX,1;ANDPS XMM0,XMM1
LFENCE;SHL RAX,1;BSR RAX,RBX
𓈗
LFENCE;SHL RAX,1;CMP RAX,RBX
𓃵
LFENCE;SHL RAX,1;IMUL RAX,RBX
𓈗
LFENCE;SHL RAX,1;LEA RAX,[RBX]
LFENCE;SHL RAX,1;MOV RAX,0X7FFFFFFF
𓃵
LFENCE;SHL RAX,1;MOV RAX,0X80000000
LFENCE;SHL RAX,1;MOVHLPS XMM0,XMM1
LFENCE;SHL RAX,1;MOVZX RAX,AX
𓃵
LFENCE;SHL RAX,1;MULPS XMM0,XMM1
LFENCE;SHL RAX,1;PADDQ MM0,MM1
LFENCE;SHL RAX,1;POPCNT RAX,RBX
𓈗
LFENCE;SHL RAX,1;SUB RAX,RBX
𓃵
LFENCE;SHL RAX,1;TEST RAX,RBX
𓃵
LFENCE;SHL RAX,1;XOR RAX,RBX
𓃵
LFENCE;STC;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;STC;MOV RAX,0X80000000
𓅥
LFENCE;STC;MOVHLPS XMM0,XMM1
𓅃
LFENCE;SUB RAX,RBX;ADD RAX,RBX
𓅥
LFENCE;SUB RAX,RBX;ADOX RAX,RBX
𓃵
LFENCE;SUB RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;SUB RAX,RBX;AND RAX,RBX
𓅥
LFENCE;SUB RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;SUB RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;SUB RAX,RBX;CMP RAX,RBX
𓅥
LFENCE;SUB RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;SUB RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;SUB RAX,RBX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;SUB RAX,RBX;MOV RAX,0X80000000
𓅥
LFENCE;SUB RAX,RBX;MOV RAX,1
𓅥
LFENCE;SUB RAX,RBX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;SUB RAX,RBX;MOVZX RAX,AX
𓅥
LFENCE;SUB RAX,RBX;MULPS XMM0,XMM1
LFENCE;SUB RAX,RBX;OR RAX,RBX
𓅥
LFENCE;SUB RAX,RBX;PADDQ MM0,MM1
LFENCE;SUB RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;SUB RAX,RBX;SHL RAX,1
𓃵
LFENCE;SUB RAX,RBX;SUB RAX,RBX
𓅥
LFENCE;SUB RAX,RBX;TEST RAX,RBX
𓅥
LFENCE;SUB RAX,RBX;XOR RAX,RBX
𓅥
LFENCE;TEST RAX,RBX;ADD RAX,RBX
𓅥
LFENCE;TEST RAX,RBX;ADOX RAX,RBX
𓃵
LFENCE;TEST RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;TEST RAX,RBX;AND RAX,RBX
𓅥
LFENCE;TEST RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;TEST RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;TEST RAX,RBX;CMP RAX,RBX
𓅥
LFENCE;TEST RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;TEST RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;TEST RAX,RBX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;TEST RAX,RBX;MOV RAX,0X80000000
𓅥
LFENCE;TEST RAX,RBX;MOV RAX,1
𓅥
LFENCE;TEST RAX,RBX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;TEST RAX,RBX;MOVZX RAX,AX
𓅥
LFENCE;TEST RAX,RBX;MULPS XMM0,XMM1
LFENCE;TEST RAX,RBX;OR RAX,RBX
𓅥
LFENCE;TEST RAX,RBX;PADDQ MM0,MM1
LFENCE;TEST RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;TEST RAX,RBX;SHL RAX,1
𓃵
LFENCE;TEST RAX,RBX;SUB RAX,RBX
𓅥
LFENCE;TEST RAX,RBX;TEST RAX,RBX
𓅥
LFENCE;TEST RAX,RBX;XOR RAX,RBX
𓅥
LFENCE;XOR RAX,RBX;ADD RAX,RBX
𓅥
LFENCE;XOR RAX,RBX;ADOX RAX,RBX
𓃵
LFENCE;XOR RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;XOR RAX,RBX;AND RAX,RBX
𓅥
LFENCE;XOR RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;XOR RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;XOR RAX,RBX;CMP RAX,RBX
𓅥
LFENCE;XOR RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;XOR RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;XOR RAX,RBX;MOV RAX,0X7FFFFFFF
𓅥
LFENCE;XOR RAX,RBX;MOV RAX,0X80000000
𓅥
LFENCE;XOR RAX,RBX;MOV RAX,1
𓅥
LFENCE;XOR RAX,RBX;MOVHLPS XMM0,XMM1
𓅃
LFENCE;XOR RAX,RBX;MOVZX RAX,AX
𓅥
LFENCE;XOR RAX,RBX;MULPS XMM0,XMM1
LFENCE;XOR RAX,RBX;OR RAX,RBX
𓅥
LFENCE;XOR RAX,RBX;PADDQ MM0,MM1
LFENCE;XOR RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;XOR RAX,RBX;SHL RAX,1
𓃵
LFENCE;XOR RAX,RBX;SUB RAX,RBX
𓅥
LFENCE;XOR RAX,RBX;TEST RAX,RBX
𓅥
LFENCE;XOR RAX,RBX;XOR RAX,RBX
𓅥
LFENCE;ADD RAX,RBX;ADD RAX,RBX
𓅃
LFENCE;ADD RAX,RBX;ADOX RAX,RBX
𓅢
LFENCE;ADD RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;ADD RAX,RBX;AND RAX,RBX
𓅃
LFENCE;ADD RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;ADD RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;ADD RAX,RBX;CMP RAX,RBX
𓅃
LFENCE;ADD RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;ADD RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;ADD RAX,RBX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;ADD RAX,RBX;MOV RAX,0X80000000
𓅃
LFENCE;ADD RAX,RBX;MOV RAX,1
𓅃
LFENCE;ADD RAX,RBX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;ADD RAX,RBX;MOVZX RAX,AX
𓅃
LFENCE;ADD RAX,RBX;MULPS XMM0,XMM1
LFENCE;ADD RAX,RBX;OR RAX,RBX
𓅃
LFENCE;ADD RAX,RBX;PADDQ MM0,MM1
LFENCE;ADD RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;ADD RAX,RBX;SHL RAX,1
𓅢
LFENCE;ADD RAX,RBX;SUB RAX,RBX
𓅃
LFENCE;ADD RAX,RBX;TEST RAX,RBX
𓅃
LFENCE;ADD RAX,RBX;XOR RAX,RBX
𓅃
LFENCE;ADOX RAX,RBX;ADD RAX,RBX
𓅢
LFENCE;ADOX RAX,RBX;ADOX RAX,RBX
𓆡
LFENCE;ADOX RAX,RBX;AESDEC XMM0,XMM1
LFENCE;ADOX RAX,RBX;AND RAX,RBX
𓅢
LFENCE;ADOX RAX,RBX;ANDPS XMM0,XMM1
𓅢
LFENCE;ADOX RAX,RBX;BSR RAX,RBX
𓈗
LFENCE;ADOX RAX,RBX;CMP RAX,RBX
𓅢
LFENCE;ADOX RAX,RBX;IMUL RAX,RBX
𓈗
LFENCE;ADOX RAX,RBX;LEA RAX,[RBX]
𓅢
LFENCE;ADOX RAX,RBX;MOV RAX,0X7FFFFFFF
LFENCE;ADOX RAX,RBX;MOV RAX,0X80000000
𓅢
LFENCE;ADOX RAX,RBX;MOVHLPS XMM0,XMM1
LFENCE;ADOX RAX,RBX;MOVZX RAX,AX
𓅢
LFENCE;ADOX RAX,RBX;MULPS XMM0,XMM1
LFENCE;ADOX RAX,RBX;OR RAX,RBX
𓅢
LFENCE;ADOX RAX,RBX;PADDQ MM0,MM1
𓃵
LFENCE;ADOX RAX,RBX;POPCNT RAX,RBX
𓈗
LFENCE;ADOX RAX,RBX;SHL RAX,1
𓆡
LFENCE;ADOX RAX,RBX;SUB RAX,RBX
𓅢
LFENCE;ADOX RAX,RBX;TEST RAX,RBX
𓅢
LFENCE;ADOX RAX,RBX;XOR RAX,RBX
𓅢
LFENCE;AESDEC XMM0,XMM1;ADD RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;ADOX RAX,RBX
𓆡
LFENCE;AESDEC XMM0,XMM1;AESDEC XMM0,XMM1
LFENCE;AESDEC XMM0,XMM1;AND RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;ANDPS XMM0,XMM1
𓃂
LFENCE;AESDEC XMM0,XMM1;BSR RAX,RBX
LFENCE;AESDEC XMM0,XMM1;CMP RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;CWDE
𓀡
LFENCE;AESDEC XMM0,XMM1;DEC RAX
𓀡
LFENCE;AESDEC XMM0,XMM1;IMUL RAX,RBX
LFENCE;AESDEC XMM0,XMM1;INC RAX
𓀡
LFENCE;AESDEC XMM0,XMM1;LEA RAX,[RBX]
𓃂
LFENCE;AESDEC XMM0,XMM1;MOV RAX,0X7FFFFFFF
𓀡
LFENCE;AESDEC XMM0,XMM1;MOV RAX,0X80000000
𓀡
LFENCE;AESDEC XMM0,XMM1;MOV RAX,1
𓀡
LFENCE;AESDEC XMM0,XMM1;MOVHLPS XMM0,XMM1
LFENCE;AESDEC XMM0,XMM1;MOVZX RAX,AX
𓀡
LFENCE;AESDEC XMM0,XMM1;MULPS XMM0,XMM1
LFENCE;AESDEC XMM0,XMM1;NEG RAX
𓀡
LFENCE;AESDEC XMM0,XMM1;NOT RAX
𓀡
LFENCE;AESDEC XMM0,XMM1;OR RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;PADDQ MM0,MM1
LFENCE;AESDEC XMM0,XMM1;POPCNT RAX,RBX
LFENCE;AESDEC XMM0,XMM1;SHL RAX,1
𓆡
LFENCE;AESDEC XMM0,XMM1;SUB RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;TEST RAX,RBX
𓀡
LFENCE;AESDEC XMM0,XMM1;XOR RAX,RBX
𓀡
LFENCE;AND RAX,RBX;ADD RAX,RBX
𓅃
LFENCE;AND RAX,RBX;ADOX RAX,RBX
𓅢
LFENCE;AND RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;AND RAX,RBX;AND RAX,RBX
𓅃
LFENCE;AND RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;AND RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;AND RAX,RBX;CMP RAX,RBX
𓅃
LFENCE;AND RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;AND RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;AND RAX,RBX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;AND RAX,RBX;MOV RAX,0X80000000
𓅃
LFENCE;AND RAX,RBX;MOV RAX,1
𓅃
LFENCE;AND RAX,RBX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;AND RAX,RBX;MOVZX RAX,AX
𓅃
LFENCE;AND RAX,RBX;MULPS XMM0,XMM1
LFENCE;AND RAX,RBX;OR RAX,RBX
𓅃
LFENCE;AND RAX,RBX;PADDQ MM0,MM1
LFENCE;AND RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;AND RAX,RBX;SHL RAX,1
𓅢
LFENCE;AND RAX,RBX;SUB RAX,RBX
𓅃
LFENCE;AND RAX,RBX;TEST RAX,RBX
𓅃
LFENCE;AND RAX,RBX;XOR RAX,RBX
𓅃
LFENCE;ANDPS XMM0,XMM1;ADD RAX,RBX
LFENCE;ANDPS XMM0,XMM1;ADOX RAX,RBX
LFENCE;ANDPS XMM0,XMM1;AESDEC XMM0,XMM1
LFENCE;ANDPS XMM0,XMM1;AND RAX,RBX
LFENCE;ANDPS XMM0,XMM1;ANDPS XMM0,XMM1
LFENCE;ANDPS XMM0,XMM1;BSR RAX,RBX
LFENCE;ANDPS XMM0,XMM1;CMP RAX,RBX
LFENCE;ANDPS XMM0,XMM1;DEC RAX
LFENCE;ANDPS XMM0,XMM1;IMUL RAX,RBX
LFENCE;ANDPS XMM0,XMM1;INC RAX
LFENCE;ANDPS XMM0,XMM1;LEA RAX,[RBX]
LFENCE;ANDPS XMM0,XMM1;MOV RAX,0X7FFFFFFF
LFENCE;ANDPS XMM0,XMM1;MOV RAX,0X80000000
LFENCE;ANDPS XMM0,XMM1;MOV RAX,1
LFENCE;ANDPS XMM0,XMM1;MOVHLPS XMM0,XMM1
LFENCE;ANDPS XMM0,XMM1;MOVZX RAX,AX
LFENCE;ANDPS XMM0,XMM1;MULPS XMM0,XMM1
LFENCE;ANDPS XMM0,XMM1;NEG RAX
LFENCE;ANDPS XMM0,XMM1;NOT RAX
LFENCE;ANDPS XMM0,XMM1;OR RAX,RBX
LFENCE;ANDPS XMM0,XMM1;PADDQ MM0,MM1
LFENCE;ANDPS XMM0,XMM1;POPCNT RAX,RBX
LFENCE;ANDPS XMM0,XMM1;SHL RAX,1
LFENCE;ANDPS XMM0,XMM1;SUB RAX,RBX
LFENCE;ANDPS XMM0,XMM1;TEST RAX,RBX
LFENCE;ANDPS XMM0,XMM1;XOR RAX,RBX
LFENCE;BSR RAX,RBX;ADD RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;ADOX RAX,RBX
𓈗
LFENCE;BSR RAX,RBX;AESDEC XMM0,XMM1
LFENCE;BSR RAX,RBX;AND RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;ANDPS XMM0,XMM1
LFENCE;BSR RAX,RBX;BSR RAX,RBX
LFENCE;BSR RAX,RBX;CMP RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;IMUL RAX,RBX
LFENCE;BSR RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;BSR RAX,RBX;MOV RAX,0X7FFFFFFF
𓇣
LFENCE;BSR RAX,RBX;MOV RAX,0X80000000
𓇣
LFENCE;BSR RAX,RBX;MOV RAX,1
𓇣
LFENCE;BSR RAX,RBX;MOVHLPS XMM0,XMM1
𓂀
LFENCE;BSR RAX,RBX;MOVZX RAX,AX
𓇣
LFENCE;BSR RAX,RBX;MULPS XMM0,XMM1
LFENCE;BSR RAX,RBX;OR RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;PADDQ MM0,MM1
LFENCE;BSR RAX,RBX;POPCNT RAX,RBX
LFENCE;BSR RAX,RBX;SHL RAX,1
𓈗
LFENCE;BSR RAX,RBX;SUB RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;TEST RAX,RBX
𓇣
LFENCE;BSR RAX,RBX;XOR RAX,RBX
𓇣
LFENCE;CBW;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;CBW;MOV RAX,0X80000000
𓅃
LFENCE;CBW;MOVHLPS XMM0,XMM1
𓃰
LFENCE;CMC;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;CMC;MOV RAX,0X80000000
𓅃
LFENCE;CMC;MOVHLPS XMM0,XMM1
𓃰
LFENCE;CMP RAX,RBX;ADD RAX,RBX
𓅃
LFENCE;CMP RAX,RBX;ADOX RAX,RBX
𓅢
LFENCE;CMP RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;CMP RAX,RBX;AND RAX,RBX
𓅃
LFENCE;CMP RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;CMP RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;CMP RAX,RBX;CMP RAX,RBX
𓅃
LFENCE;CMP RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;CMP RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;CMP RAX,RBX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;CMP RAX,RBX;MOV RAX,0X80000000
𓅃
LFENCE;CMP RAX,RBX;MOV RAX,1
𓅃
LFENCE;CMP RAX,RBX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;CMP RAX,RBX;MOVZX RAX,AX
𓅃
LFENCE;CMP RAX,RBX;MULPS XMM0,XMM1
LFENCE;CMP RAX,RBX;OR RAX,RBX
𓅃
LFENCE;CMP RAX,RBX;PADDQ MM0,MM1
LFENCE;CMP RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;CMP RAX,RBX;SHL RAX,1
𓅢
LFENCE;CMP RAX,RBX;SUB RAX,RBX
𓅃
LFENCE;CMP RAX,RBX;TEST RAX,RBX
𓅃
LFENCE;CMP RAX,RBX;XOR RAX,RBX
𓅃
LFENCE;CWDE;AESDEC XMM0,XMM1
𓆣
LFENCE;CWDE;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;CWDE;MOV RAX,0X80000000
𓅃
LFENCE;CWDE;MOVHLPS XMM0,XMM1
𓃰
LFENCE;DEC RAX;AESDEC XMM0,XMM1
𓆣
LFENCE;DEC RAX;ANDPS XMM0,XMM1
𓂀
LFENCE;DEC RAX;LEA RAX,[RBX]
𓂀
LFENCE;DEC RAX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;DEC RAX;MOV RAX,0X80000000
𓅃
LFENCE;DEC RAX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;DEC RAX;MULPS XMM0,XMM1
LFENCE;DEC RAX;POPCNT RAX,RBX
𓆏
LFENCE;IMUL RAX,RBX;ADD RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;ADOX RAX,RBX
𓈗
LFENCE;IMUL RAX,RBX;AESDEC XMM0,XMM1
LFENCE;IMUL RAX,RBX;AND RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;ANDPS XMM0,XMM1
LFENCE;IMUL RAX,RBX;BSR RAX,RBX
LFENCE;IMUL RAX,RBX;CMP RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;IMUL RAX,RBX
LFENCE;IMUL RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;IMUL RAX,RBX;MOV RAX,0X7FFFFFFF
𓇣
LFENCE;IMUL RAX,RBX;MOV RAX,0X80000000
𓇣
LFENCE;IMUL RAX,RBX;MOV RAX,1
𓇣
LFENCE;IMUL RAX,RBX;MOVHLPS XMM0,XMM1
𓂀
LFENCE;IMUL RAX,RBX;MOVZX RAX,AX
𓇣
LFENCE;IMUL RAX,RBX;MULPS XMM0,XMM1
LFENCE;IMUL RAX,RBX;OR RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;PADDQ MM0,MM1
LFENCE;IMUL RAX,RBX;POPCNT RAX,RBX
LFENCE;IMUL RAX,RBX;SHL RAX,1
𓈗
LFENCE;IMUL RAX,RBX;SUB RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;TEST RAX,RBX
𓇣
LFENCE;IMUL RAX,RBX;XOR RAX,RBX
𓇣
LFENCE;INC RAX;AESDEC XMM0,XMM1
𓆣
LFENCE;INC RAX;ANDPS XMM0,XMM1
𓂀
LFENCE;INC RAX;LEA RAX,[RBX]
𓂀
LFENCE;INC RAX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;INC RAX;MOV RAX,0X80000000
𓅃
LFENCE;INC RAX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;INC RAX;MULPS XMM0,XMM1
LFENCE;INC RAX;POPCNT RAX,RBX
𓆏
LFENCE;LEA RAX,[RBX];ADD RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];ADOX RAX,RBX
𓈗
LFENCE;LEA RAX,[RBX];AESDEC XMM0,XMM1
LFENCE;LEA RAX,[RBX];AND RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];ANDPS XMM0,XMM1
LFENCE;LEA RAX,[RBX];BSR RAX,RBX
LFENCE;LEA RAX,[RBX];CMP RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];DEC RAX
𓇣
LFENCE;LEA RAX,[RBX];IMUL RAX,RBX
LFENCE;LEA RAX,[RBX];INC RAX
𓇣
LFENCE;LEA RAX,[RBX];LEA RAX,[RBX]
𓂀
LFENCE;LEA RAX,[RBX];MOV RAX,0X7FFFFFFF
𓇣
LFENCE;LEA RAX,[RBX];MOV RAX,0X80000000
𓇣
LFENCE;LEA RAX,[RBX];MOV RAX,1
𓇣
LFENCE;LEA RAX,[RBX];MOVHLPS XMM0,XMM1
LFENCE;LEA RAX,[RBX];MOVZX RAX,AX
𓇣
LFENCE;LEA RAX,[RBX];MULPS XMM0,XMM1
LFENCE;LEA RAX,[RBX];NEG RAX
𓇣
LFENCE;LEA RAX,[RBX];NOT RAX
𓇣
LFENCE;LEA RAX,[RBX];OR RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];PADDQ MM0,MM1
LFENCE;LEA RAX,[RBX];POPCNT RAX,RBX
LFENCE;LEA RAX,[RBX];SHL RAX,1
LFENCE;LEA RAX,[RBX];SUB RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];TEST RAX,RBX
𓇣
LFENCE;LEA RAX,[RBX];XOR RAX,RBX
𓇣
LFENCE;MOV RAX,0X7FFFFFFF;ADD RAX,RBX
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;ADOX RAX,RBX
𓅢
LFENCE;MOV RAX,0X7FFFFFFF;AESDEC XMM0,XMM1
𓆣
LFENCE;MOV RAX,0X7FFFFFFF;AND RAX,RBX
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;ANDPS XMM0,XMM1
𓂀
LFENCE;MOV RAX,0X7FFFFFFF;BSR RAX,RBX
𓆏
LFENCE;MOV RAX,0X7FFFFFFF;CBW
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;CMC
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;CMP RAX,RBX
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;CWDE
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;DEC RAX
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;IMUL RAX,RBX
𓆏
LFENCE;MOV RAX,0X7FFFFFFF;INC RAX
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;LEA RAX,[RBX]
𓂀
LFENCE;MOV RAX,0X7FFFFFFF;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;MOV RAX,0X80000000
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;MOV RAX,1
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;MOVHLPS XMM0,XMM1
𓃰
LFENCE;MOV RAX,0X7FFFFFFF;MOVZX RAX,AX
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;MULPS XMM0,XMM1
LFENCE;MOV RAX,0X7FFFFFFF;NEG RAX
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;NOT RAX
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;OR RAX,RBX
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;PADDQ MM0,MM1
LFENCE;MOV RAX,0X7FFFFFFF;POPCNT RAX,RBX
𓆏
LFENCE;MOV RAX,0X7FFFFFFF;SHL RAX,1
𓅢
LFENCE;MOV RAX,0X7FFFFFFF;STC
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;SUB RAX,RBX
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;TEST RAX,RBX
𓅃
LFENCE;MOV RAX,0X7FFFFFFF;XOR RAX,RBX
𓅃
LFENCE;MOV RAX,0X80000000;ADD RAX,RBX
𓅃
LFENCE;MOV RAX,0X80000000;ADOX RAX,RBX
𓅢
LFENCE;MOV RAX,0X80000000;AESDEC XMM0,XMM1
𓆣
LFENCE;MOV RAX,0X80000000;AND RAX,RBX
𓅃
LFENCE;MOV RAX,0X80000000;ANDPS XMM0,XMM1
𓂀
LFENCE;MOV RAX,0X80000000;BSR RAX,RBX
𓆏
LFENCE;MOV RAX,0X80000000;CBW
𓅃
LFENCE;MOV RAX,0X80000000;CMC
𓅃
LFENCE;MOV RAX,0X80000000;CMP RAX,RBX
𓅃
LFENCE;MOV RAX,0X80000000;CWDE
𓅃
LFENCE;MOV RAX,0X80000000;DEC RAX
𓅃
LFENCE;MOV RAX,0X80000000;IMUL RAX,RBX
𓆏
LFENCE;MOV RAX,0X80000000;INC RAX
𓅃
LFENCE;MOV RAX,0X80000000;LEA RAX,[RBX]
𓂀
LFENCE;MOV RAX,0X80000000;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;MOV RAX,0X80000000;MOV RAX,0X80000000
𓅃
LFENCE;MOV RAX,0X80000000;MOV RAX,1
𓅃
LFENCE;MOV RAX,0X80000000;MOVHLPS XMM0,XMM1
𓃰
LFENCE;MOV RAX,0X80000000;MOVZX RAX,AX
𓅃
LFENCE;MOV RAX,0X80000000;MULPS XMM0,XMM1
LFENCE;MOV RAX,0X80000000;NEG RAX
𓅃
LFENCE;MOV RAX,0X80000000;NOT RAX
𓅃
LFENCE;MOV RAX,0X80000000;OR RAX,RBX
𓅃
LFENCE;MOV RAX,0X80000000;PADDQ MM0,MM1
LFENCE;MOV RAX,0X80000000;POPCNT RAX,RBX
𓆏
LFENCE;MOV RAX,0X80000000;SHL RAX,1
𓅢
LFENCE;MOV RAX,0X80000000;STC
𓅃
LFENCE;MOV RAX,0X80000000;SUB RAX,RBX
𓅃
LFENCE;MOV RAX,0X80000000;TEST RAX,RBX
𓅃
LFENCE;MOV RAX,0X80000000;XOR RAX,RBX
𓅃
LFENCE;MOV RAX,1;ADD RAX,RBX
𓅃
LFENCE;MOV RAX,1;ADOX RAX,RBX
𓅢
LFENCE;MOV RAX,1;AESDEC XMM0,XMM1
𓆣
LFENCE;MOV RAX,1;AND RAX,RBX
𓅃
LFENCE;MOV RAX,1;ANDPS XMM0,XMM1
𓂀
LFENCE;MOV RAX,1;BSR RAX,RBX
𓆏
LFENCE;MOV RAX,1;CMP RAX,RBX
𓅃
LFENCE;MOV RAX,1;IMUL RAX,RBX
𓆏
LFENCE;MOV RAX,1;LEA RAX,[RBX]
𓂀
LFENCE;MOV RAX,1;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;MOV RAX,1;MOV RAX,0X80000000
𓅃
LFENCE;MOV RAX,1;MOVHLPS XMM0,XMM1
𓃰
LFENCE;MOV RAX,1;MOVZX RAX,AX
𓅃
LFENCE;MOV RAX,1;MULPS XMM0,XMM1
LFENCE;MOV RAX,1;PADDQ MM0,MM1
LFENCE;MOV RAX,1;POPCNT RAX,RBX
𓆏
LFENCE;MOV RAX,1;SUB RAX,RBX
𓅃
LFENCE;MOV RAX,1;TEST RAX,RBX
𓅃
LFENCE;MOV RAX,1;XOR RAX,RBX
𓅃
LFENCE;MOVHLPS XMM0,XMM1;ADD RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;ADOX RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;AESDEC XMM0,XMM1
LFENCE;MOVHLPS XMM0,XMM1;AND RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;ANDPS XMM0,XMM1
LFENCE;MOVHLPS XMM0,XMM1;BSR RAX,RBX
𓂀
LFENCE;MOVHLPS XMM0,XMM1;CMP RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;DEC RAX
LFENCE;MOVHLPS XMM0,XMM1;IMUL RAX,RBX
𓂀
LFENCE;MOVHLPS XMM0,XMM1;INC RAX
LFENCE;MOVHLPS XMM0,XMM1;LEA RAX,[RBX]
LFENCE;MOVHLPS XMM0,XMM1;MOV RAX,0X7FFFFFFF
LFENCE;MOVHLPS XMM0,XMM1;MOV RAX,0X80000000
LFENCE;MOVHLPS XMM0,XMM1;MOV RAX,1
LFENCE;MOVHLPS XMM0,XMM1;MOVHLPS XMM0,XMM1
LFENCE;MOVHLPS XMM0,XMM1;MOVZX RAX,AX
LFENCE;MOVHLPS XMM0,XMM1;MULPS XMM0,XMM1
LFENCE;MOVHLPS XMM0,XMM1;NEG RAX
LFENCE;MOVHLPS XMM0,XMM1;NOT RAX
LFENCE;MOVHLPS XMM0,XMM1;OR RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;PADDQ MM0,MM1
LFENCE;MOVHLPS XMM0,XMM1;POPCNT RAX,RBX
𓂀
LFENCE;MOVHLPS XMM0,XMM1;SHL RAX,1
LFENCE;MOVHLPS XMM0,XMM1;SUB RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;TEST RAX,RBX
LFENCE;MOVHLPS XMM0,XMM1;XOR RAX,RBX
LFENCE;MOVZX RAX,AX;ADD RAX,RBX
𓅃
LFENCE;MOVZX RAX,AX;ADOX RAX,RBX
𓅢
LFENCE;MOVZX RAX,AX;AESDEC XMM0,XMM1
𓆣
LFENCE;MOVZX RAX,AX;AND RAX,RBX
𓅃
LFENCE;MOVZX RAX,AX;ANDPS XMM0,XMM1
𓂀
LFENCE;MOVZX RAX,AX;BSR RAX,RBX
𓆏
LFENCE;MOVZX RAX,AX;CMP RAX,RBX
𓅃
LFENCE;MOVZX RAX,AX;IMUL RAX,RBX
𓆏
LFENCE;MOVZX RAX,AX;LEA RAX,[RBX]
𓂀
LFENCE;MOVZX RAX,AX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;MOVZX RAX,AX;MOV RAX,0X80000000
𓅃
LFENCE;MOVZX RAX,AX;MOV RAX,1
𓅃
LFENCE;MOVZX RAX,AX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;MOVZX RAX,AX;MOVZX RAX,AX
𓅃
LFENCE;MOVZX RAX,AX;MULPS XMM0,XMM1
LFENCE;MOVZX RAX,AX;OR RAX,RBX
𓅃
LFENCE;MOVZX RAX,AX;PADDQ MM0,MM1
LFENCE;MOVZX RAX,AX;POPCNT RAX,RBX
𓆏
LFENCE;MOVZX RAX,AX;SHL RAX,1
𓅢
LFENCE;MOVZX RAX,AX;SUB RAX,RBX
𓅃
LFENCE;MOVZX RAX,AX;TEST RAX,RBX
𓅃
LFENCE;MOVZX RAX,AX;XOR RAX,RBX
𓅃
LFENCE;MULPS XMM0,XMM1;ADD RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;ADOX RAX,RBX
𓆡
LFENCE;MULPS XMM0,XMM1;AESDEC XMM0,XMM1
LFENCE;MULPS XMM0,XMM1;AND RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;ANDPS XMM0,XMM1
𓃂
LFENCE;MULPS XMM0,XMM1;BSR RAX,RBX
LFENCE;MULPS XMM0,XMM1;CMP RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;DEC RAX
𓀡
LFENCE;MULPS XMM0,XMM1;IMUL RAX,RBX
LFENCE;MULPS XMM0,XMM1;INC RAX
𓀡
LFENCE;MULPS XMM0,XMM1;LEA RAX,[RBX]
𓃂
LFENCE;MULPS XMM0,XMM1;MOV RAX,0X7FFFFFFF
𓀡
LFENCE;MULPS XMM0,XMM1;MOV RAX,0X80000000
𓀡
LFENCE;MULPS XMM0,XMM1;MOV RAX,1
𓀡
LFENCE;MULPS XMM0,XMM1;MOVHLPS XMM0,XMM1
LFENCE;MULPS XMM0,XMM1;MOVZX RAX,AX
𓀡
LFENCE;MULPS XMM0,XMM1;MULPS XMM0,XMM1
LFENCE;MULPS XMM0,XMM1;NEG RAX
𓀡
LFENCE;MULPS XMM0,XMM1;NOT RAX
𓀡
LFENCE;MULPS XMM0,XMM1;OR RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;PADDQ MM0,MM1
LFENCE;MULPS XMM0,XMM1;POPCNT RAX,RBX
LFENCE;MULPS XMM0,XMM1;SHL RAX,1
𓆡
LFENCE;MULPS XMM0,XMM1;SUB RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;TEST RAX,RBX
𓀡
LFENCE;MULPS XMM0,XMM1;XOR RAX,RBX
𓀡
LFENCE;NEG RAX;AESDEC XMM0,XMM1
𓆣
LFENCE;NEG RAX;ANDPS XMM0,XMM1
𓂀
LFENCE;NEG RAX;LEA RAX,[RBX]
𓂀
LFENCE;NEG RAX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;NEG RAX;MOV RAX,0X80000000
𓅃
LFENCE;NEG RAX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;NEG RAX;MULPS XMM0,XMM1
LFENCE;NEG RAX;POPCNT RAX,RBX
𓆏
LFENCE;NOT RAX;AESDEC XMM0,XMM1
𓆣
LFENCE;NOT RAX;ANDPS XMM0,XMM1
𓂀
LFENCE;NOT RAX;LEA RAX,[RBX]
𓂀
LFENCE;NOT RAX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;NOT RAX;MOV RAX,0X80000000
𓅃
LFENCE;NOT RAX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;NOT RAX;MULPS XMM0,XMM1
LFENCE;NOT RAX;POPCNT RAX,RBX
𓆏
LFENCE;OR RAX,RBX;ADD RAX,RBX
𓅃
LFENCE;OR RAX,RBX;ADOX RAX,RBX
𓅢
LFENCE;OR RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;OR RAX,RBX;AND RAX,RBX
𓅃
LFENCE;OR RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;OR RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;OR RAX,RBX;CMP RAX,RBX
𓅃
LFENCE;OR RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;OR RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;OR RAX,RBX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;OR RAX,RBX;MOV RAX,0X80000000
𓅃
LFENCE;OR RAX,RBX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;OR RAX,RBX;MOVZX RAX,AX
𓅃
LFENCE;OR RAX,RBX;MULPS XMM0,XMM1
LFENCE;OR RAX,RBX;OR RAX,RBX
𓅃
LFENCE;OR RAX,RBX;PADDQ MM0,MM1
LFENCE;OR RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;OR RAX,RBX;SUB RAX,RBX
𓅃
LFENCE;OR RAX,RBX;TEST RAX,RBX
𓅃
LFENCE;OR RAX,RBX;XOR RAX,RBX
𓅃
LFENCE;PADDQ MM0,MM1;ADD RAX,RBX
𓅢
LFENCE;PADDQ MM0,MM1;ADOX RAX,RBX
𓆡
LFENCE;PADDQ MM0,MM1;AESDEC XMM0,XMM1
LFENCE;PADDQ MM0,MM1;AND RAX,RBX
𓅢
LFENCE;PADDQ MM0,MM1;ANDPS XMM0,XMM1
𓃂
LFENCE;PADDQ MM0,MM1;BSR RAX,RBX
LFENCE;PADDQ MM0,MM1;CMP RAX,RBX
𓅢
LFENCE;PADDQ MM0,MM1;DEC RAX
𓅢
LFENCE;PADDQ MM0,MM1;IMUL RAX,RBX
LFENCE;PADDQ MM0,MM1;INC RAX
𓅢
LFENCE;PADDQ MM0,MM1;LEA RAX,[RBX]
𓃰
LFENCE;PADDQ MM0,MM1;MOV RAX,0X7FFFFFFF
𓅢
LFENCE;PADDQ MM0,MM1;MOV RAX,0X80000000
𓀡
LFENCE;PADDQ MM0,MM1;MOV RAX,1
𓅢
LFENCE;PADDQ MM0,MM1;MOVHLPS XMM0,XMM1
LFENCE;PADDQ MM0,MM1;MOVZX RAX,AX
𓅢
LFENCE;PADDQ MM0,MM1;MULPS XMM0,XMM1
LFENCE;PADDQ MM0,MM1;NEG RAX
𓅢
LFENCE;PADDQ MM0,MM1;NOT RAX
𓅢
LFENCE;PADDQ MM0,MM1;OR RAX,RBX
𓅢
LFENCE;PADDQ MM0,MM1;PADDQ MM0,MM1
LFENCE;PADDQ MM0,MM1;POPCNT RAX,RBX
LFENCE;PADDQ MM0,MM1;SHL RAX,1
𓆡
LFENCE;PADDQ MM0,MM1;SUB RAX,RBX
𓅢
LFENCE;PADDQ MM0,MM1;TEST RAX,RBX
𓅢
LFENCE;PADDQ MM0,MM1;XOR RAX,RBX
𓅢
LFENCE;POPCNT RAX,RBX;ADD RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;ADOX RAX,RBX
𓈗
LFENCE;POPCNT RAX,RBX;AESDEC XMM0,XMM1
LFENCE;POPCNT RAX,RBX;AND RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;ANDPS XMM0,XMM1
LFENCE;POPCNT RAX,RBX;BSR RAX,RBX
LFENCE;POPCNT RAX,RBX;CMP RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;DEC RAX
𓇣
LFENCE;POPCNT RAX,RBX;IMUL RAX,RBX
LFENCE;POPCNT RAX,RBX;INC RAX
𓇣
LFENCE;POPCNT RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;POPCNT RAX,RBX;MOV RAX,0X7FFFFFFF
𓇣
LFENCE;POPCNT RAX,RBX;MOV RAX,0X80000000
𓇣
LFENCE;POPCNT RAX,RBX;MOV RAX,1
𓇣
LFENCE;POPCNT RAX,RBX;MOVHLPS XMM0,XMM1
𓂀
LFENCE;POPCNT RAX,RBX;MOVZX RAX,AX
𓇣
LFENCE;POPCNT RAX,RBX;MULPS XMM0,XMM1
LFENCE;POPCNT RAX,RBX;NEG RAX
𓇣
LFENCE;POPCNT RAX,RBX;NOT RAX
𓇣
LFENCE;POPCNT RAX,RBX;OR RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;PADDQ MM0,MM1
LFENCE;POPCNT RAX,RBX;POPCNT RAX,RBX
LFENCE;POPCNT RAX,RBX;SHL RAX,1
𓈗
LFENCE;POPCNT RAX,RBX;SUB RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;TEST RAX,RBX
𓇣
LFENCE;POPCNT RAX,RBX;XOR RAX,RBX
𓇣
LFENCE;SHL RAX,1;ADD RAX,RBX
𓅢
LFENCE;SHL RAX,1;ADOX RAX,RBX
𓆡
LFENCE;SHL RAX,1;AESDEC XMM0,XMM1
LFENCE;SHL RAX,1;AND RAX,RBX
𓅢
LFENCE;SHL RAX,1;ANDPS XMM0,XMM1
LFENCE;SHL RAX,1;BSR RAX,RBX
𓈗
LFENCE;SHL RAX,1;CMP RAX,RBX
𓅢
LFENCE;SHL RAX,1;IMUL RAX,RBX
𓈗
LFENCE;SHL RAX,1;LEA RAX,[RBX]
𓅢
LFENCE;SHL RAX,1;MOV RAX,0X7FFFFFFF
𓅢
LFENCE;SHL RAX,1;MOV RAX,0X80000000
LFENCE;SHL RAX,1;MOVHLPS XMM0,XMM1
LFENCE;SHL RAX,1;MOVZX RAX,AX
𓅢
LFENCE;SHL RAX,1;MULPS XMM0,XMM1
LFENCE;SHL RAX,1;PADDQ MM0,MM1
𓃵
LFENCE;SHL RAX,1;POPCNT RAX,RBX
𓈗
LFENCE;SHL RAX,1;SUB RAX,RBX
𓅢
LFENCE;SHL RAX,1;TEST RAX,RBX
𓅢
LFENCE;SHL RAX,1;XOR RAX,RBX
𓅢
LFENCE;STC;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;STC;MOV RAX,0X80000000
𓅃
LFENCE;STC;MOVHLPS XMM0,XMM1
𓃰
LFENCE;SUB RAX,RBX;ADD RAX,RBX
𓅃
LFENCE;SUB RAX,RBX;ADOX RAX,RBX
𓅢
LFENCE;SUB RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;SUB RAX,RBX;AND RAX,RBX
𓅃
LFENCE;SUB RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;SUB RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;SUB RAX,RBX;CMP RAX,RBX
𓅃
LFENCE;SUB RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;SUB RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;SUB RAX,RBX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;SUB RAX,RBX;MOV RAX,0X80000000
𓅃
LFENCE;SUB RAX,RBX;MOV RAX,1
𓅃
LFENCE;SUB RAX,RBX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;SUB RAX,RBX;MOVZX RAX,AX
𓅃
LFENCE;SUB RAX,RBX;MULPS XMM0,XMM1
LFENCE;SUB RAX,RBX;OR RAX,RBX
𓅃
LFENCE;SUB RAX,RBX;PADDQ MM0,MM1
LFENCE;SUB RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;SUB RAX,RBX;SHL RAX,1
𓅢
LFENCE;SUB RAX,RBX;SUB RAX,RBX
𓅃
LFENCE;SUB RAX,RBX;TEST RAX,RBX
𓅃
LFENCE;SUB RAX,RBX;XOR RAX,RBX
𓅃
LFENCE;TEST RAX,RBX;ADD RAX,RBX
𓅃
LFENCE;TEST RAX,RBX;ADOX RAX,RBX
𓅢
LFENCE;TEST RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;TEST RAX,RBX;AND RAX,RBX
𓅃
LFENCE;TEST RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;TEST RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;TEST RAX,RBX;CMP RAX,RBX
𓅃
LFENCE;TEST RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;TEST RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;TEST RAX,RBX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;TEST RAX,RBX;MOV RAX,0X80000000
𓅃
LFENCE;TEST RAX,RBX;MOV RAX,1
𓅃
LFENCE;TEST RAX,RBX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;TEST RAX,RBX;MOVZX RAX,AX
𓅃
LFENCE;TEST RAX,RBX;MULPS XMM0,XMM1
LFENCE;TEST RAX,RBX;OR RAX,RBX
𓅃
LFENCE;TEST RAX,RBX;PADDQ MM0,MM1
LFENCE;TEST RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;TEST RAX,RBX;SHL RAX,1
𓅢
LFENCE;TEST RAX,RBX;SUB RAX,RBX
𓅃
LFENCE;TEST RAX,RBX;TEST RAX,RBX
𓅃
LFENCE;TEST RAX,RBX;XOR RAX,RBX
𓅃
LFENCE;XOR RAX,RBX;ADD RAX,RBX
𓅃
LFENCE;XOR RAX,RBX;ADOX RAX,RBX
𓅢
LFENCE;XOR RAX,RBX;AESDEC XMM0,XMM1
𓆣
LFENCE;XOR RAX,RBX;AND RAX,RBX
𓅃
LFENCE;XOR RAX,RBX;ANDPS XMM0,XMM1
𓂀
LFENCE;XOR RAX,RBX;BSR RAX,RBX
𓆏
LFENCE;XOR RAX,RBX;CMP RAX,RBX
𓅃
LFENCE;XOR RAX,RBX;IMUL RAX,RBX
𓆏
LFENCE;XOR RAX,RBX;LEA RAX,[RBX]
𓂀
LFENCE;XOR RAX,RBX;MOV RAX,0X7FFFFFFF
𓅃
LFENCE;XOR RAX,RBX;MOV RAX,0X80000000
𓅃
LFENCE;XOR RAX,RBX;MOV RAX,1
𓅃
LFENCE;XOR RAX,RBX;MOVHLPS XMM0,XMM1
𓃰
LFENCE;XOR RAX,RBX;MOVZX RAX,AX
𓅃
LFENCE;XOR RAX,RBX;MULPS XMM0,XMM1
LFENCE;XOR RAX,RBX;OR RAX,RBX
𓅃
LFENCE;XOR RAX,RBX;PADDQ MM0,MM1
LFENCE;XOR RAX,RBX;POPCNT RAX,RBX
𓆏
LFENCE;XOR RAX,RBX;SHL RAX,1
𓅢
LFENCE;XOR RAX,RBX;SUB RAX,RBX
𓅃
LFENCE;XOR RAX,RBX;TEST RAX,RBX
𓅃
LFENCE;XOR RAX,RBX;XOR RAX,RBX
𓅃