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LFENCE;VMOVDDUP XMM0,XMM1;MOVZX RAX,AX on Broadwell (more architectures)

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AssemblyLFENCE;VMOVDDUP XMM0,XMM1;MOVZX RAX,AX
Architecture CodenameBroadwell
Port Eligibility Instr. 1None
Port Eligibility Instr. 21*p5 (2846 other cmds. with the same port eligibility for instr. 2)
Port Eligibility Instr. 31*p0156 (6662 other cmds. with the same port eligibility for instr. 3)
(802 other cmds. with the same port eligibility for both instr. 2 and instr. 3)
Total Instr. Length (bytes)11
Cutoff 11288 (741 other commands with the same cutoff)
Cutoff 22576
Instruction 1LFENCE
Swap 🔄 Instruction 2 VMOVDDUP XMM0,XMM1 (444 other commands with the same Instruction 2)
Instruction 3MOVZX RAX,AX (444 other commands with the same Instruction 3)
Number of instructions3
Graph Generationpython3 unroll_csv.py -a BDW -asm "LFENCE;VMOVDDUP XMM0,XMM1;MOVZX RAX,AX" && python3 normalize_cycles.py
Length Instruction 1 (bytes)3
Length Instruction 2 (bytes)4
Length Instruction 3 (bytes)4
Regioningtrue
Region Characterization Type1 (850 other commands with the same type)
Element Order Changes Regioning Effecttrue
Element Order Change DescriptionDifferent pattern of Type34

LFENCE;VMOVDDUP XMM0,XMM1;MOVZX RAX,AX on additional architectures:

Other commands where Cutoff 1 = 1288:

741 instructions, click for details

Other commands where Instruction 2 = VMOVDDUP XMM0,XMM1:

444 instructions, click for details

Other commands where Instruction 3 = MOVZX RAX,AX:

444 instructions, click for details

Other commands where Region Characterization = Type1:

850 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p5:

2846 instructions, click for details

Other commands where the port eligibility for Instruction 3 is 1*p0156:

6662 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p5 and for Instruction 3 is 1*p0156: