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LFENCE;MOV RAX,0X80000000;CRC32 RAX,RBX on Cascade Lake (more architectures)

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AssemblyLFENCE;MOV RAX,0X80000000;CRC32 RAX,RBX
Architecture CodenameCascade Lake
Port Eligibility Instr. 1None
Port Eligibility Instr. 21*p0156 (6662 other cmds. with the same port eligibility for instr. 2)
Port Eligibility Instr. 3None (644 other cmds. with the same port eligibility for instr. 3)
(134 other cmds. with the same port eligibility for both instr. 2 and instr. 3)
Total Instr. Length (bytes)14
Cutoff 1None (10976 other commands with the same cutoff)
Cutoff 2None
Instruction 1LFENCE
Swap 🔄 Instruction 2 MOV RAX,0X80000000 (444 other commands with the same Instruction 2)
Instruction 3CRC32 RAX,RBX (444 other commands with the same Instruction 3)
Number of instructions3
Graph Generationpython3 unroll_csv.py -a CSL -asm "LFENCE;MOV RAX,0X80000000;CRC32 RAX,RBX" && python3 normalize_cycles.py
Length Instruction 1 (bytes)3
Length Instruction 2 (bytes)5
Length Instruction 3 (bytes)6
Regioningtrue
Region Characterization Type36 (299 other commands with the same type)
Element Order Changes Regioning Effecttrue
Element Order Change DescriptionDifferent pattern of Type41

LFENCE;MOV RAX,0X80000000;CRC32 RAX,RBX on additional architectures:

Other commands where Cutoff 1 = None:

10976 instructions, click for details

Other commands where Instruction 2 = MOV RAX,0X80000000:

444 instructions, click for details

Other commands where Instruction 3 = CRC32 RAX,RBX:

444 instructions, click for details

Other commands where Region Characterization = Type36:

299 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p0156:

6662 instructions, click for details

Other commands where the port eligibility for Instruction 3 is None:

644 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p0156 and for Instruction 3 is None: