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LFENCE;SHL RAX,1;PADDB MM0,MM1 on Haswell (more architectures)

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AssemblyLFENCE;SHL RAX,1;PADDB MM0,MM1
Architecture CodenameHaswell
Port Eligibility Instr. 1None
Port Eligibility Instr. 21*p06 (1248 other cmds. with the same port eligibility for instr. 2)
Port Eligibility Instr. 31*p15 (1576 other cmds. with the same port eligibility for instr. 3)
(86 other cmds. with the same port eligibility for both instr. 2 and instr. 3)
Total Instr. Length (bytes)9
Cutoff 11575 (1309 other commands with the same cutoff)
Cutoff 23164
Instruction 1LFENCE
Swap 🔄 Instruction 2 SHL RAX,1 (444 other commands with the same Instruction 2)
Instruction 3PADDB MM0,MM1 (444 other commands with the same Instruction 3)
Number of instructions3
Graph Generationpython3 unroll_csv.py -a HSW -asm "LFENCE;SHL RAX,1;PADDB MM0,MM1" && python3 normalize_cycles.py
Length Instruction 1 (bytes)3
Length Instruction 2 (bytes)3
Length Instruction 3 (bytes)3
Regioningtrue
Region Characterization Type29 (407 other commands with the same type)
Element Order Changes Regioning Effecttrue
Element Order Change DescriptionDifferent pattern of Type31

LFENCE;SHL RAX,1;PADDB MM0,MM1 on additional architectures:

Other commands where Cutoff 1 = 1575:

1309 instructions, click for details

Other commands where Instruction 2 = SHL RAX,1:

444 instructions, click for details

Other commands where Instruction 3 = PADDB MM0,MM1:

444 instructions, click for details

Other commands where Region Characterization = Type29:

407 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p06:

1248 instructions, click for details

Other commands where the port eligibility for Instruction 3 is 1*p15:

1576 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p06 and for Instruction 3 is 1*p15: