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LFENCE;AESDECLAST XMM0,XMM1;CBW on Skylake (more architectures)

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AssemblyLFENCE;AESDECLAST XMM0,XMM1;CBW
Architecture CodenameSkylake
Port Eligibility Instr. 1None
Port Eligibility Instr. 21*p0 (696 other cmds. with the same port eligibility for instr. 2)
Port Eligibility Instr. 31*p0156 (6662 other cmds. with the same port eligibility for instr. 3)
(228 other cmds. with the same port eligibility for both instr. 2 and instr. 3)
Total Instr. Length (bytes)10
Cutoff 11212 (463 other commands with the same cutoff)
Cutoff 22424
Instruction 1LFENCE
Swap 🔄 Instruction 2 AESDECLAST XMM0,XMM1 (444 other commands with the same Instruction 2)
Instruction 3CBW (445 other commands with the same Instruction 3)
Number of instructions3
Graph Generationpython3 unroll_csv.py -a SKL -asm "LFENCE;AESDECLAST XMM0,XMM1;CBW" && python3 normalize_cycles.py
Length Instruction 1 (bytes)3
Length Instruction 2 (bytes)5
Length Instruction 3 (bytes)2
Regioningtrue
Region Characterization Type42 (766 other commands with the same type)
Element Order Changes Regioning Effecttrue
Element Order Change DescriptionDifferent pattern of Type16

LFENCE;AESDECLAST XMM0,XMM1;CBW on additional architectures:

Other commands where Cutoff 1 = 1212:

463 instructions, click for details

Other commands where Instruction 2 = AESDECLAST XMM0,XMM1:

444 instructions, click for details

Other commands where Instruction 3 = CBW:

445 instructions, click for details

Other commands where Region Characterization = Type42:

766 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p0:

696 instructions, click for details

Other commands where the port eligibility for Instruction 3 is 1*p0156:

6662 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p0 and for Instruction 3 is 1*p0156: