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LFENCE;BSF RAX,RBX;ANDN RAX,RBX,RCX on Skylake (more architectures)

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AssemblyLFENCE;BSF RAX,RBX;ANDN RAX,RBX,RCX
Architecture CodenameSkylake
Port Eligibility Instr. 1None
Port Eligibility Instr. 21*p1 (2358 other cmds. with the same port eligibility for instr. 2)
Port Eligibility Instr. 31*p15 (1576 other cmds. with the same port eligibility for instr. 3)
(182 other cmds. with the same port eligibility for both instr. 2 and instr. 3)
Total Instr. Length (bytes)12
Cutoff 1None (10976 other commands with the same cutoff)
Cutoff 2None
Instruction 1LFENCE
Swap 🔄 Instruction 2 BSF RAX,RBX (444 other commands with the same Instruction 2)
Instruction 3ANDN RAX,RBX,RCX (398 other commands with the same Instruction 3)
Number of instructions3
Graph Generationpython3 unroll_csv.py -a SKL -asm "LFENCE;BSF RAX,RBX;ANDN RAX,RBX,RCX" && python3 normalize_cycles.py
Length Instruction 1 (bytes)3
Length Instruction 2 (bytes)4
Length Instruction 3 (bytes)5
Regioningfalse
Region Characterization Type32 (1025 other commands with the same type)
Element Order Changes Regioning Effecttrue
Element Order Change DescriptionDifferent pattern of Type26

LFENCE;BSF RAX,RBX;ANDN RAX,RBX,RCX on additional architectures:

Other commands where Cutoff 1 = None:

10976 instructions, click for details

Other commands where Instruction 2 = BSF RAX,RBX:

444 instructions, click for details

Other commands where Instruction 3 = ANDN RAX,RBX,RCX:

398 instructions, click for details

Other commands where Region Characterization = Type32:

1025 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p1:

2358 instructions, click for details

Other commands where the port eligibility for Instruction 3 is 1*p15:

1576 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p1 and for Instruction 3 is 1*p15: