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LFENCE;VADDPS XMM0,XMM1,XMM2;BSR RAX,RBX on Skylake (more architectures)

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AssemblyLFENCE;VADDPS XMM0,XMM1,XMM2;BSR RAX,RBX
Architecture CodenameSkylake
Port Eligibility Instr. 1None
Port Eligibility Instr. 21*p01 (1344 other cmds. with the same port eligibility for instr. 2)
Port Eligibility Instr. 31*p1 (2358 other cmds. with the same port eligibility for instr. 3)
(120 other cmds. with the same port eligibility for both instr. 2 and instr. 3)
Total Instr. Length (bytes)11
Cutoff 11102 (274 other commands with the same cutoff)
Cutoff 22204
Instruction 1LFENCE
Swap 🔄 Instruction 2 VADDPS XMM0,XMM1,XMM2 (444 other commands with the same Instruction 2)
Instruction 3BSR RAX,RBX (444 other commands with the same Instruction 3)
Number of instructions3
Graph Generationpython3 unroll_csv.py -a SKL -asm "LFENCE;VADDPS XMM0,XMM1,XMM2;BSR RAX,RBX" && python3 normalize_cycles.py
Length Instruction 1 (bytes)3
Length Instruction 2 (bytes)4
Length Instruction 3 (bytes)4
Regioningfalse
Region Characterization Type15 (219 other commands with the same type)
Element Order Changes Regioning Effecttrue
Element Order Change DescriptionDifferent pattern of Type45

LFENCE;VADDPS XMM0,XMM1,XMM2;BSR RAX,RBX on additional architectures:

Other commands where Cutoff 1 = 1102:

274 instructions, click for details

Other commands where Instruction 2 = VADDPS XMM0,XMM1,XMM2:

444 instructions, click for details

Other commands where Instruction 3 = BSR RAX,RBX:

444 instructions, click for details

Other commands where Region Characterization = Type15:

219 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p01:

1344 instructions, click for details

Other commands where the port eligibility for Instruction 3 is 1*p1:

2358 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p01 and for Instruction 3 is 1*p1: