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LFENCE;VANDNPS XMM0,XMM1,XMM2;BLSI RAX,RBX on Skylake (more architectures)

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AssemblyLFENCE;VANDNPS XMM0,XMM1,XMM2;BLSI RAX,RBX
Architecture CodenameSkylake
Port Eligibility Instr. 1None
Port Eligibility Instr. 21*p015 (3019 other cmds. with the same port eligibility for instr. 2)
Port Eligibility Instr. 31*p15 (1576 other cmds. with the same port eligibility for instr. 3)
(188 other cmds. with the same port eligibility for both instr. 2 and instr. 3)
Total Instr. Length (bytes)12
Cutoff 11010 (151 other commands with the same cutoff)
Cutoff 22020
Instruction 1LFENCE
Swap 🔄 Instruction 2 VANDNPS XMM0,XMM1,XMM2 (444 other commands with the same Instruction 2)
Instruction 3BLSI RAX,RBX (398 other commands with the same Instruction 3)
Number of instructions3
Graph Generationpython3 unroll_csv.py -a SKL -asm "LFENCE;VANDNPS XMM0,XMM1,XMM2;BLSI RAX,RBX" && python3 normalize_cycles.py
Length Instruction 1 (bytes)3
Length Instruction 2 (bytes)4
Length Instruction 3 (bytes)5
Regioningtrue
Region Characterization Type30 (420 other commands with the same type)
Element Order Changes Regioning Effecttrue
Element Order Change DescriptionDifferent pattern of Type26

LFENCE;VANDNPS XMM0,XMM1,XMM2;BLSI RAX,RBX on additional architectures:

Other commands where Cutoff 1 = 1010:

151 instructions, click for details

Other commands where Instruction 2 = VANDNPS XMM0,XMM1,XMM2:

444 instructions, click for details

Other commands where Instruction 3 = BLSI RAX,RBX:

398 instructions, click for details

Other commands where Region Characterization = Type30:

420 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p015:

3019 instructions, click for details

Other commands where the port eligibility for Instruction 3 is 1*p15:

1576 instructions, click for details

Other commands where the port eligibility for Instruction 2 is 1*p015 and for Instruction 3 is 1*p15: